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https://md.roflcopter.fr/s/rxJ124OZl#

Logos for the projects of the PEQUAN team

Control of accuracy and debugging for Fortran applications

Automatic transformation of C source codes for usage with Cadna

Coriolis VLSI CAD Tools

Alliance/Coriolis Toolkit & Checker contain various design flow examples, blocks or full chips. It is also used as a regression test for all the tools.

This repo has been moved to Github: https://github.com/itoumlilt/Colony.