Skip to content
GitLab
Explore
Sign in
Primary navigation
Search or go to…
Project
Alliance VLSI EDA
Manage
Activity
Members
Labels
Plan
Issues
Issue boards
Milestones
Wiki
Code
Merge requests
Repository
Branches
Commits
Tags
Repository graph
Compare revisions
Snippets
Build
Pipelines
Jobs
Pipeline schedules
Artifacts
Deploy
Releases
Container registry
Model registry
Operate
Environments
Monitor
Incidents
Analyze
Value stream analytics
Contributor analytics
CI/CD analytics
Repository analytics
Model experiments
Help
Help
Support
GitLab documentation
Compare GitLab plans
Community forum
Contribute to GitLab
Provide feedback
Keyboard shortcuts
?
Snippets
Groups
Projects
Show more breadcrumbs
Coriolis VLSI EDA
Alliance VLSI EDA
Commits
4a9f6736
Commit
4a9f6736
authored
11 years ago
by
Jean-Paul Chaput
Browse files
Options
Downloads
Patches
Plain Diff
This commit is only to test (try 16) the mailing list.
parent
5d22f797
Branches
Branches containing commit
Tags
v5.1.0
Tags containing commit
No related merge requests found
Changes
1
Show whitespace changes
Inline
Side-by-side
Showing
1 changed file
dev/scripts/marker
+1
-1
1 addition, 1 deletion
dev/scripts/marker
with
1 addition
and
1 deletion
dev/scripts/marker
+
1
−
1
View file @
4a9f6736
...
...
@@ -28,4 +28,4 @@ You are welcome to use the software package even for commercial designs
whithout any fee. You are just required to mention : "Designed with
Alliance CAD system"
For Try 1
5
For Try 1
6
This diff is collapsed.
Click to expand it.
Preview
0%
Loading
Try again
or
attach a new file
.
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Save comment
Cancel
Please
register
or
sign in
to comment